Tristate Buffer ( VHDL ) with Test Bench

Decoder ( VERILOG ) with Test Fixture ( Another Logic )

Decoder ( VERILOG ) with Test Fixture

Encoder ( VERILOG ) with Test Fixture

TFF ( Verilog ) with Test Fixture

TFF ( Verilog ) with Test Fixture

DFF ( Verilog ) with Test Fixture

JKFF ( Verilog ) with Test Fixture

Demux 1 x 4 ( Verilog ) with Test Fixture

Comparator Behavioral ( Verilog ) with Test Fixture

Displaying Given Data ( Verilog Program )

Full Subtractor ( Verilog ) with Test Fixture

Multiplexer 4 x 1 ( Verilog ) with Test Fixture

Full Adder ( Verilog ) with Test Fixture

4(4-bit) x 1 mux ( Dataflow ) with Test Bench

3-Bit UP / DOWN Counter ( Structural ) with Test Bench Program

3-Bit UP / DOWN Counter ( Behavioral ) with Test Bench Program

Ripple Carry Adder Dataflow with Testbench Program

NOT Gate in Verilog

XNOR Gate in Verilog

NAND Gate in Verilog

NOR Gate in Verilog

AND Gate in Verilog

XOR Gate in Verilog

OR ( VERILOG ) with Text Fixture

Reading a single character From a text Document

Reading integer From a text Document

Write Data to a File in VHDL ( Here to .txt)

Write Data to a File in VHDL ( Here to .doc)

Johnson Reverse-Johnson Counter ( 8bit ) Behavioral (Clock divided by 2^27)

8 bit Johnson Counter Behavioral (Clock divided by 2^27)

4 x 1 Mux Dataflow with Testbench

FPGA Design Steps

Half Adder ( VERILOG ) with Text Fixture

Test bench Program for HALF SUBTRACTOR

Test bench Program for HALF ADDER

Test bench Program for AND - Gate

Test bench Program for Sequence Detector For the Sequence "1011" (Mealy Model)

Test bench for 4 bit Up-Counter

Test bench for Toggle Flip-Flop

Serail In Serial Out Shift Register With the Help of Loop Statement

SR Flip-Flop with the help of 'Variable'

Delay Flip-Flop with the help of 'Variable'

JK Flip-Flop with the help of 'Variable'

Toggle Flip-flop with the help of 'Variable'

Priority Encoder - Data flow Architecture( Using Std_match)

Demultiplexer using case (input and others)

Defining New Package in VHDL Programme

Detect the number " 100 " when enable is high

BCH Decoding

BCH Encoding in a Simple Way