8 bit Johnson Counter Behavioral (Clock divided by 2^27)

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_unsigned.ALL;

entity j_counter is

    Port ( clk : in  STD_LOGIC;

           q : out  STD_LOGIC_VECTOR (7 downto 0));

end j_counter;

architecture Behavioral of j_counter is

signal qt: STD_LOGIC_VECTOR (7 downto 0):=(others=>'0');

signal clk_g:  STD_LOGIC:='0';

signal t_27 : STD_LOGIC_VECTOR (26 downto 0):=(others=>'0');

begin

  prc_div: process(clk) begin

if(clk'event and clk='1') then

if(t_27=X"FFFFFF7") then

t_27<=(others=>'0');

else

t_27<=t_27+1;

end if;

end if;

  end process;

  clk_g<=t_27(26);

 process(clk_g) begin

   if(clk_g'event and clk_g='1') then

qt(7)<= not qt(0);

qt(6 downto 0)<= qt(7 downto 1);

end if;

end process;

  q<=qt;

     

end Behavioral;