Demultiplexer using case (input and others)

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity dmx1 is
    Port ( a : in  STD_LOGIC;
           s : in  STD_LOGIC_VECTOR (1 downto 0);
           y : out  STD_LOGIC_VECTOR (3 downto 0));
end dmx1;

architecture Behavioral of dmx1 is

begin
process(s)
begin
case s is
when "00"=>y<=(3=>a, others=>'0');
when "01"=>y<=(2=>a, others=>'0');
when "10"=>y<=(1=>a, others=>'0');
when "11"=>y<=(0=>a, others=>'0');
when others=>y<="0000";
end case;
end process;
end Behavioral;