Monday, 31 October 2016

Write Data to a File in VHDL ( Here to .txt)




library ieee;
use STD.textio.all;
use IEEE.STD_LOGIC_TEXTIO.all;

entity rand_gen is
end rand_gen;

architecture behavior of rand_gen is

begin

process
    variable L: line;
    variable T: time;
    variable line_var : line;
    file text_var : text;
begin  
    file_open(text_var,"aabc_file.txt",write_mode);  --open the file for writing.
        write(line_var, string'("www."&"vhdl4all"&".blogspot"&".in"));
        writeline(text_var,line_var);
    file_close(text_var);
    wait;
end process;

end behavior;

No comments:

Post a Comment