library IEEE;
use
IEEE.STD_LOGIC_1164.ALL;
entity JK_FF is
Port ( clk,
clr, pr, J,K :in STD_LOGIC ;
Q ,Q_n : inout STD_LOGIC );
end JK_FF;
architecture Behavioral of
JK_FF is
begin
process (clk, clr, pr, J,K)
begin
if pr = '0' then
Q<='1';Q_n<='0';
elsif clr ='0' then
Q<='0';Q_n<='1';
elsif clk='0' and clk'event
then
if
(J='0' and K='0') then Q<=Q; Q_n<=Q_n;
elsif (J='0' and K='1') then Q<='0';Q_n<='1';
elsif (J='1' and K='0') then Q<='1';Q_n<='0';
else Q<=Q_n;Q_n<=Q ;
end
if;
end if;
end process;
end Behavioral;
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