SEQUENCE DETECTOR for the Sequence 1011011 (Behavioral) Moore type

library ieee;
use ieee.std_logic_1164.all;

entity seqdet is
port (clock,reset : in std_logic;din:in std_logic; output: out std_logic);
end seqdet;

architecture behav of seqdet is
type state is (s0,s1,s2,s3,s4,s5,s6,s7);
signal pres,nexts: state;
begin

process(clock)
begin
if (rising_edge (clock))then
if( reset='1') then
pres<=s0;
else pres<=nexts;
end if;
end if;
end process;


process(pres,din)
begin
case pres is
when s0 => if(din='1') then
           nexts<=s1;
 else
 nexts<=s0;
 end if;
  output<='0';

when s1 => if(din='0') then
           nexts<=s2;
 else
 nexts<=s1;
 end if;
  output<='0';

when s2  =>if(din='1') then
           nexts<=s3;
 else
 nexts<=s0;
 end if;
  output<='0';

when s3  =>if(din='1') then
           nexts<=s4;
 else
 nexts<=s2;
 end if;
  output<='0';

when s4  =>if(din='0') then
           nexts<=s5;
 else
 nexts<=s1;
 end if;
  output<='0';

when s5  =>if(din='0') then
           nexts<=s0;
 else
 nexts<=s6;
 end if;
  output<='0';

when s6  =>if(din='0') then
           nexts<=s2;
 else
 nexts<=s7;
 end if;
  output<='0';

when s7  =>if(din='0') then
           nexts<=s2;
 else
 nexts<=s1;
 end if;
 output<='1';
end case;
end process;
end behav;