SEQUENCE DETECTOR for the Sequence 100011 (Behavioral) Mealy type

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity detector is
    Port ( x : in  STD_LOGIC;
           clk : in  STD_LOGIC;
           z : out  STD_LOGIC:='0');
end detector;

architecture Behavioral of detector is
type state_type is(A,B,C,D,E,F);
signal sreg,snext:state_type;

begin
process(clk)
begin
  if clk' event and clk='1' then
  sreg<=snext;
       if sreg=F and X='1' then z<='1';
       else z<='0';
       end if;
  end if;
end process;

process(sreg,x)
begin

case sreg is
when A=>if X='0' then snext<=A;
else snext<=B;
end if;

when B=>if X='0' then snext<=C;
else snext<=B;
end if;

when C=>if X='0' then snext<=D;
else snext<=B;
end if;

when D=>if X='0' then snext<=E;
else snext<=B;
end if;

when E=>if X='0' then snext<=A;
else snext<=F;
end if;

when F=>if X='0' then snext<=C;
else snext<=A;
end if;

end case;
end process;
end Behavioral;