Parity Depended Multiplier/Divider ( Dataflow )

-- If the input number is even parity, the output will be the double of the input number.
-- Else output will be half of input number.
library IEEE; use IEEE.STD_LOGIC_1164.ALL;
entity p_m_d is Port ( a : in STD_LOGIC_VECTOR (3 downto 0); y : out STD_LOGIC_VECTOR (4 downto 0)); end p_m_d; architecture Dataflow of p_m_d is signal b,c : STD_LOGIC_VECTOR (4 downto 0):="00000"; signal x: STD_LOGIC;
begin x<=a(0) xor a(1) xor a(2) xor a(3); c<=("00"&a(3 downto 1)); b<=(a&'0'); with x select Y<=c when '1', b when '0'; end Dataflow;